CE 338: Digital VLSI Design (Laboratory), Fall 2023
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Lab 1 Review of Superposition, Thevenin's Equivalent Circuit, and LTSpice. Due Monday 9/4 at 10 pm.
9/5, Lab 2 Design an R-2R DAC. Due Monday 9/11 at 10 pm.
9/12, Lab 3 Layout the R-2R DAC. Due Monday 9/18 at 10 pm.
9/19, Lab 4 MOSFETs and IV Curves. Due Monday 9/25 at 10 pm.
video, notes, sim files
9/26, Lab 5 The Inverter. Due Monday 10/2 at 10 pm.
10/3 and 10/10, Lab 6 Build a NAND, NOR, XOR, and Full Adder. (2-week lab) Due Monday 10/16 at 10 pm
10/17, Lab 7 Using Buses in ElectricVLSI. Due Monday 10/23 at 10 pm.
10/24 and 10/31, Lab 8 Design a MUX, and a High-Speed Full Adder. Due Monday 11/6 at 10 pm.
11/7 and 11/14, Lab 9 Design an 8-Bit ALU. Due 11/28 at 10 pm.
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