Materials: LTSpice, Electric VLSI
Methods: First, electric VLSI was installed and LTSpice was integrated into their simulation. A sample DAC was then copied into electric VLSI and a sample simulation was run confirming everything was working properly.
After everything was confirmed to be working in order, 10k n-well resistors and off page connectors were used to create an R-2R resistor ladder. To simulate the ladder, the aformentioned simulation file was used and the sample DAC was replaced with the R-2R DAC that we created. A simulation was run using LTSpice to confirm the DAC was working properly.
For the final task, every pin except for the B9 pin was grounded and the output was connected to ground via a 10pf resistor. The hand calculations were completed using Therevenin's law and the formula 0.7RC. The simulation was then run to confirm the results of the hand calculation.
Results:
Figure 1. Simulation results from sample DAC confirming that Electric VLSI and LTSpice are working as intended and setup properly.
Figure 2. R_2R_Ladder of custom made layout, I struggled to get the sizing right but it worked.
Figure 3. LTSpice simulation result, it is clear this is a less than ideal DAC since the step sizes aren't consistent but it does work as intended converting the values properly.
Fiugre 4.
