CE433 2022 Spring
Lab  6
John Hitti
jdhitti@fortlewis.edu

Lab 6

Introduction
This Lab we will be using our FPGA to display scenes to a monitor via VGA. We will be coding these scenes in Verilog and then using Vivado to upload them to our FPGA.

Task 1
In this task we will program the FPGA to display a green line down the middle of the display. We can do this by reusing the VGA code from a previous week project.
To display only a green line in the middle we add some conditional statements to the VGA_module module.






The code is then uploaded and verified.




Task 2
In this task we will add another small red bar by adding more conditional statements.


The code is then uploaded and verified.



Task 3
In this task we will add movement to the red box! This is done with more conditional statements and by adding a counter to move the block every second.



The code is then uploaded and verified.




Task 4
In this task we make the box move in a back and forth pattern.



The code is then uploaded and verified.



Discussion
This lab was an excellent way to strengthen our skills using the VGA protocol and also in writing more complex code. I felt like this lab really helped me to get a deeper understanding of the code and what specifically it is doing on the FPGA.