CE 433 Lab Spring 2022
Lab 8
Name: David Lee
Email: djlee1@fortlewis.edu

PicoBlaze SoftCore
In this lab we use Verilog to create code that we will use in vivado to make our FPGA board function

Materials and Methods:
gvim(was used to write the verilog), Vivado and Basys 3Board

Results:

Task 1: Repeat the work in section 1. Create a square calculator that uses the 7segment display


Figure 1: Shows the Code used in Task 1 (First Part)


Figure 2: Shows the Code used in Task 1 (Second Part)


Figure 3: Shows the video of the board functioning how it should


Task 2: Modify the display on the LEDs as well


Figure 4: Shows the Modified disp_mux file (First Part)


Figure 5: Shows the Modified disp_mux file (Second Part)


Figure 6: Shows the Modified disp_mux file (Third Part)


Figure 7: Shows video of the task being completed


Figure 8: Shows the conversion of g_to_a to a_to_g


Task 3: Modify the code to display the results in HEX form on an LCD display


Figure 9: Shows part of the additional code used.


Figure 10: Shows the video of the LCD and 7 Segment Displaying the same thing


5. Discussion
This lab was able to be successfully completed. The last section gave me the hardest time beucase of the way I approached didnt allow me to really change the clock to a fast enough speed to have the LCD look still while keeping the 7segment display looking still. So besides that little Challenge It was a good lab to finish and make work.