ENGR337 Lab 2020 Spring
Lab 2
Name: Nic Theobald
Email: nstheobald@fortlewis.edu

Introduction:

RC circuits can be used to reduce the amplitude and delay of the input signal. If not designed correctly, the circuit can cut off some of the information of the input signal. This lab follows the results of chnages made to various RC circuits. 

Materials:

Part:	Count:
100k, 1k, 100 ohm Resistors	x1
680p, 100p, 10p Farad Capacitors	x1
Osciliscope	x1
Signal Generator	x1

Methods:

As shown in figure 1, Vout does not resemble Vin. This is due to the low bandwidth (the capacitor is not given enough time/current to charge up all the way). Just as in the previous circuit, the circuit shown in figure 2 lacks the bandwidth to fully charge the capacitor. This shows that chnaging the voltage does not affect the bandwidth and/or the charging of the capacitor. The only way to affect the bandwidth is to change the current, the size of the capacitors, or how long voltage is provided. The circuits shown in figure 3, figure 4, an dfigure 5 achieve this by changing Ton/Tperiod, the size of the capacitor, or the current, respectively. The circuit in figure 3 achieves this by increasing how long current is prvided to the capacitor, therefore decresing the time it takes to charge the capactiror. The circuit shown in figure 4 acheives this by lowering the size of the capacitor, therefore decreasing the time it takes to charge the capcitor. The circuit shown in figure 5 achieves this through decreasing resistance, therefore increasing current. The bandwidth of a crcuit can also be changed by differing the frequency, as shown in figure 6 and 7. The circuit shown in figure 8 is built on the bread board and Vo/Vi and time delay is determined (figure 8, 9). The DC aspect of the oscilliscope is simulated and unknown values are calculated (figure 10).The DC aspect of the oscilliscope is simulated and unknown values are calculated (figure 12).

Results:

Task 1	Figure 1: Original Low Bandwidth Circuit	Figure 2: Pulse Voltage Dropped to 2V
	Figure 3:: Ton and Tperiod set to 1u and 2.1u Respectively	Figure 4: Reducing Capacitor Size to 10p
	Figure 5: Reducing resistor to 100 ohm
Task 1.3:	Figure 6: Changing Frequency in Order to increase Bandwidth (Simulation)	Figure 7: Changing Frequency in Order to increase Bandwidth (Bread Board)
		Time Delay: 10.3 ms
Task: 2	Figure 8: Simulated Time Delay	Figure 9: Measure and Calculated Time Delay
		. Vi = 10v Vo = 2.4v td 20.6us
Task: 3.1	Figure 10: Simulated DC Cable	Figure 11: DC Cable Calculations
Task: 3.2	Figure 12: Simulated AC Cable	Figure 13: AC Cable Calculations
Task 3.3	The scopes probe is set to 10:1. If changed to 1:1, values will be 1/10 of their actual value.

Discussion:

No notes were taken during this lab