Introduction:
The goal of this lab is to learn how to build MOSFETS in electricVLSI, and to be able to run simulations to verify the mosfets functionality. First we started off by creating a new schematic for the NMOS and orientating it correctly to match up with the layout we would be doing next. Next, we created a layout view adding nMos nodes, two nAct nodes and a metal one contact. Following we changed sizes to match the datafile, connected the layout with wires and added ports. Then we repeated the same steps in creating the PMOS schematic and layout. After this we wrote spice code and verified the MOSFETs were working correctly.
Results:
First we created a schematic of the NMOS 4, then went on to creating the layout(shown below)
Figure 1: DRC clean of NMOS MOSFET
Figure 2: DRC clean of layout of PMOS MOSFET
Figure 3: ERC clean for NMOS MOSFET
Figure 4: ERC clean for PMOS
Figure 5: NCC clean for NMOS
Figure 6: NCC clean for PMOS
Figure 7: Simulation results for NMOS
Figure 8: Simulation results for PMOS
Conclusion:
I really enjoyed this lab, the guide was very step by step and gave a lot of useful things to look out for when something goes wrong. Overall the lab went very smoothly and I am happy with the results. It is important to note that the plot for PMOS simulation looks to be opposite of Dr. Li's results, but the axis are flipped so it is the same plot.