ENGR 338 Spring 2021
Final Project
Name: Zane Sauer
Email: zmsauer@fortlewis.edu

Task 1:

Figure 1: 3 Input NAND Gate


Figure 2: 3 input NAND simulation, input of 0 0 0 output of 1


Figure 3: Second simulation of 3 input NAND gate input of 110 outout of 1V


Figure 4: Final simulation of 3 input NAND gate , input of 111 output of 0V

Task 2:

Figure 5: TI DFF


Figure 6: TI DFF simulation 1


Figure 7: TI DFF Simulation 2

Task 3:

Figure 8: SAR Block


Figure 9: SAR block simulation

Conclusion
Overall this was a really nice final project, it was nice to go back to LTSpice to keep up with running this software.