ENGR338 Digital Electronics 2021 Spring
Lab 3 - MOSFETs and IV Curves
Name: Ryan Jeanes
MOSFETs and IV Curves
voltages across MOSFETs will give you an IV curve where you can see the
cutoff, saturation region, and linear regions of the plots.
was used to build the NMOS and PMOS transistor, and simulated using
LTSpice after passing appropriate design checks.
PMOS and NMOS
schematics and layouts were created, and all passed DRC, NCC, and well
checks. The simulations were ran and the various IV curves were plotted
for each transistor.
Figure 1 - Layout of the NMOS transistor
Figure 2 - NMOS schematic and NCC check verifying exports and topologies match
Figure 3 - Layout of the PMOS transistor
Figure 4 - Schematic of PMOS transistor and NCC check verifying all exports and topologies match.
Figure 5 - Current v. Voltage plot of Is through NMOS transistor
Figure 6 - Current v Voltage plot of Is through PMOS transistor