CE433 Embedded Devices Spring 2022
Homework 3 - Combinational Logic Blocks
Name: Ryan Jeanes

Email: rejeanes@fortlewis.edu

Homework 3 - Combinational Logic Blocks
Task 1 

Figure 1 - Verilog code for both the one bit FA and one bit HA

Figure 2 - Sim of the one bit HA

Figure 3 - Sim of the one bit FA
Task 2

Figure 4 - Code for 1 bit comparator

Figure 5 - 1 bit comparator simulation

Task 3

Figure 6 - Code for 4 bit comparator

Figure 7 - Simulation for 4 bit comparator

Task 4

Figure 8 - Code for 2 bit comparator
Task 5

Figure 9 - Code for 2-4 decoder

Figure 10 - Simulation for the 2-4 decoder
Task 6

Figure 11 - Code for 8x3 priority encoder

Figure 12 - Simulation for 8x3 priority encoder
Task 7

Figure 12 - Simulation for 8x3 priority encoder

<iframe width="420" height="315" src="https://youtu.be/b1OxyzzpQx4" frameborder="0" allowfullscreen></iframe>
Task 8

Figure 13 - Even parity generator
code

Figure 14 - Simulator for even parity generator


Figure 15 - Code for even parity checker

Figure 16 - Simulation of even parity checker

I cannot get embeds to work, Kompozer keeps grinding to a halt along with spamming me with seemingly endless server certification warnings every time I try to implement the HTML code for video embedding.

So here is the even parity generator
Here is the even parity checker
Task 8

Figure 17 - Code for home alarm module


Figure 18 - Code for car park module


I cannot get embeds to work, Kompozer keeps grinding to a halt along with spamming me with seemingly endless server certification warnings every time I try to implement the HTML code for video embedding.

So here is the  home alarm,
and here is the car park.