ENGR338 Lab 2021 Spring
Lab 3
Name: Nicolas Llarena
 Email: Njllarenaarias@fortlewis.edu

1. Lab 3 - Laying out the R-2R DAC
2. Introduction
The Purpose of this lab is to get familiar with Electric VLSI by using ADCs and DACs together by creating schematics. We will create subcells of an R_2R Ladder so we can build the ladder easier and safer. We will also use the layout of the R_2R DAC using N-Well resistors. This lab should help us be more familiar with Electric VLSI for future projects and laboratories.
3. Materials
Materials Quantity
LTSpice Software
 1
Calculator
 1
ElectricVLSI Software
 1

4. Results

Task 1



Figure 1. Creating a subcell of the R_2R Ladder to be able to copy and paste it for future shematics. DRC check was performed to show no errors.

        
      
Figure 2. Creating an R_2R Ladder from the subcells from figure 1 by copying and pasting them. DRC check was performed again to check errors.

Task 2
     
Figure 3. Creating the layout of the first subscell for the R_2R Ladder. DRC and NCC check are displayed showing no errors or warnings.

      
Figure 4. After laying out the ten subcells and connecting all of the exports, the last 10k single resistor was added at the bottom and connected to the ground as well as performed DRC and NCC checks.


         
Figure 5. The DAC that was used in lab 1 was replaced with the new R_2R Ladder that was made with subcells. A simulation was made in LTSpice to confirm that everything was done correctly.

 


Discussion
This lab helped me learn more about Electri VLSI. Everytime I use it, I learn more ways of doing the same thing. Being able to create subcells to be able to copy and paste them in large projects is a great idea since it makes it safer and easier to layout schematics. we can also specify the size of the resistors in Electric VLSI, this is also helpful for accuracy. Overall, it was a good experience. it is always good to have hands on experience with schematic layout even though it is only a simulation.