CE 433 Lab 2022 Spring
Lab 2
Name: Nicolas Llarena
Email: Njllarenaarias@fortlewis.edu

1. Lab 2 - Introductions to FPGA

2. Introduction
The purpose of this lab is to work with the BASYS 3 boards and vivado to generate simple gate simulations and learn the different ways we can program them into the FPGA to have a functional board. This will prepare us for future projects that might be bigger and more challenging.

3. Materials
Materials Quantity
BASYS 3 FPGA
 1
vivado
 1
Gvim
 1

4. Results

Task 1



Figure 1. Creating and simulating an AND gate in vivado.


Task 2
      
Video 1. Volatile and non-volatile methods of programming an AND gate into the FPGA.
Task 3



Figure 2. Creating and simulating an OR gate in vivado.




Figure 3. Creating and simulating an XOR gate in vivado.



         
Video 2. Volatile and non-volatile methods of programming an OR gate into the FPGA.



        
Video 3. Volatile and non-volatile methods of programming an XOR gate into the FPGA.


Discussion

This was a very informative tutorial for this lab. at parts I had issues because my constraints file did not have "LED" in capitals and I did not realize that until many failed tries to generate bitstream. Besides that, the lab was interesting and I learned a lot on how to at least start to use FPGAs I am looking forward for the future labs where we learn how to do bigger projects with FPGAs.