CE 433 Lab 2022 Spring
Homework 4
Name: Nicolas Llarena
Email: Njllarenaarias@fortlewis.edu

1. Homework 4 - Data Storage Units

2. Introduction
The purpose of this homework is to work with sr latches and different kinds of flip flops. We will also work with ROMs. These will all be implemented in vivado by using verilog to create simulations to confirm their functionality. We will also work with ROMs to read different types of files.

3. Materials
Materials Quantity
Vivado
 1
Gvim
 1

4. Results

Task 1



Task 1. Code and simulation of an SR Latch done in Vivado.


Task 1.1. Code and simulation of an SR Flip-Flop done in Vivado.



Task 1.2. Code and simulation of a D Flip-Flop done in Vivado.



Task 2



Task 2. Code and simulation of a JK Flip-Flop done in Vivado.




Task 2.2. Code and simulation of a T Flip-Flop done in Vivado.



Task 3




Task 3.1. Code and simulation of a ROM file reading 8-bit binary numbers done in Vivado.



Task 3.2. Code and simulation of a ROM file reading hex data done in Vivado.



Task 3.3. Code and simulation of a ROM file reading 8-bit data done in Vivado.




Task 3.4. Code and simulation of a ROM file reading 3-bit data done in Vivado.



Discussion
This homework was very long and we had to code a lot of flip flops and different types of ROMs. It was a good reminder of how most of these systems work and how to implement them using verilog. The simulations also help to visualize how they work in the real world. Overall, it was a time consuming but interesting homework.