CE 433 Lab 2
Name: Max Krauss
Email: mtkrauss@fortlewis.edu

Lab 2 - Verilog, Vivado, and FPGA Basics
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The purpose of this lab is to give a hands on approach to programming FPGA's using Vivado.

Materials: Baysys3, Vivado,USB-C, and a personal computing device for photo/video results.

Tasks:
1. Go through all the steps in this lab instruction, report your code, simulation results, and the on-board verification results. (30 points)

Figure 1:  Or Gate verilog code in Vivado.

Figure 2: Or Gate simulation testbench verilog code in Vivado.

Figure 3: Or Gate testbench verilog code in Vivado.

Figure 4: Vivado Simulation of the OR gate logic.

2. Use the same procedure to create  XOR  gate. Run simulations to verify the logic. (30 points) For the XOR gate simulation and

Figure 6: Xor Gate verilog code in Vivado.

Figure 7: Xor Gate Logic Simulation in Vivado.

-On board verification for both Or and Xor gates are displayed below in problem three.

3. Use both the volatile and nonvolatile methods (QSPI) to program your FPGA. Show videos for the demonstrations. (40 points)

To demonstrate both volatile and nonvolatile methods, I programmed my FPGA using both .bit and .bin files written by Vivado. The .bit file is a volatile method as the program will be wiped once the power is removed from the FPGA. The .bin file allows the program to be uploaded to the spansion memory chip on the FPGA, making it nonvolatile. This means that even if the power is removed, the program will remain on the board and is still usable when you power the FPGA up.

For my nonvolatile Xor gate verification, I start the video with the FPGA powered down. You can see, that when I power the board on, the Xor logic is still programmed into the memory. For the volatile verification, I demonstrate the logic is programmed into the FPGA, then, I restart the FPGA and verify that the program is no longer programmed into the memory.




Results: The tutorial for this lab was concise and allowed me to use Vivado to program my FPGA by myself. It was a great hands on intro into how FPGA's are programmed and used. It is astounding how powerful Vivado as it can sythesize and write programmable files directly into an FPGA from a simple Verilog code written in GVIM.