FLC Summer Fellowship 2022
Week 1 Report
Name: David Lee
Email: djlee1@fortlewis.edu

Introduction:
This week my objective was to learn how to use the Zedboard Zynq-7000 FPGA. This is a very complex board compared to the BASYS3 Board that I have prevouilsy worked with. This board has many different features that I will be testing out. Inorder to program this board I first need to learn the basicals of it so to do that I implemented very basic functions to make sure that it was setup in Vivado correctly. Once I got two basic functions completed I started digging into the more complex features of the board. The first feature I learned about was the OLED display. I have worked with these before but it was with an Arduino board and not an FPGA. This took a lot of trial to be able to fully understand what was happening inorder to make the display work. After that was completed I started learning how to use the IP component maker in Vivado inorder to implement HDMI output for week 2 of the program.  For many parts of this  I was following online tutorails inorder to get a grasp on the concepts. These tutorials will be referenced through out.

Materials and Methods:
ZedBoard, Vivado(2019.2).

Results:
Task 1: Learn how to connect and setup Vivado for the Zynq-7000

Using this link, will bring you to the page in Figure 1. The File highlighted in Green is the constraint file needed to be able to program the board.The download files highlighted in yellow are for understanding what you have and the functionailties of the board and what you can do with it. These are important to read through and try some of the demonstrations that are mentioned. Figure 2 show the selections needed when you go to program the board using Vivado.



Figure 1: Files for download to learn about the board.


Figure 2: Shows the highlighted Selections when setting up Vivado.

Task 2: Test Functionality of the Board by implementing basic Verilog code

Some changes had to be made to the constraint file to make it so we wouldn't have to call each  LED or Switch indivually. Since you should be Familiar with Vivado I'll let you figure out what changes are needed within the constraint File.


Figure 3: Shows the code used for Switch Controlled LEDs


Figure 4: Shows the Video of the implementation of Figure 3


Figure 5: Shows the code used for Button Controlled LEDs


Figure 6: Shows the Video of the implementation of Figure 5

Task 3: Display on to the OLED Display

To be able to learn about the OLED on this board I followed some online tutorials and videos. This was a very important step for me to complete that way I was able to fully understand what I needed to do inorder to correctly display on the OLED. The videos that I followed where by Vipin Kizheppatt, on youtube and here is the link to the first of the 3 videos I watched for it.


Figure 7:  This is used for the Refreshing of the Screen


Figure 8:  Top Module that pulls everything together and sends the Data from the text to display


Figure 9:  SPI interface for controls on Data Being Sent


Figure 10: This is the code for each of the characters on the keyboard to beable to use SPI. (DO NOT TYPE THIS- Use this File)


Figure 11: This controls all the things of the OLED display itself. (Do Not Type- Use this File)


Figure 12: Shows the Text wanted being Displayed on the OLED.


Task 4: Display to an External Monitor Using HDMI
Since we have previously learned about external displays while using VGA on the BASYS3 board I wanted to try and output using HDMI since it is the newer techonolgy that is replacing VGA display outputs. This task has been much harder than I orginally thought becuase of the way it needs to be implemented in Vivado to make it work. Instead of just using Verilog to make all the connection what the tutorials online say to do is to use the Vivado IP INTEGRATOR. Since I have never used this before I needed to learn how to do it and I followed these tutorials.

Task 4.1: Learn how to use the IP component creator/layout in Vivado

This part of the task is all about learning how to use this other design approach.


Figure 13: Shows the component layout made follwoing the tutorials mentioned above.

Task 4.2: Create the HDMI OUPUT layout and block

I have yet to complete this portion due to the Unfamilarity with the IP program approach. This has proven to be more difficult than I originally thought.

Discussion:
This first week of the Summer Fellowship I have developed a better and deeper understanding on how FPGA work and just how complex and useful they can be. I have also learned that the newer the Technology you are trying to implement the more variables there are to deal with which makes it harder to learn and get a full understanding. My plan for the second week is to finish with the HDMI ouput, be able to successfully complete Task 4, and then to start working with the ARM coding approach since that is a big addition that the Zynq-7000 is able to offer.