CE 433 Lab Spring 2022
Lab 6
Name: David Lee
Email: djlee1@fortlewis.edu

Basys 3 and VGA
In this lab we use Verilog to create code that we will use in vivado to make our FPGA board function

Materials and Methods:
gvim(was used to write the verilog), Vivado and Basys 3Board

Results:


Figure 1: Shows the code the top module

*** All Tasks Use this TopModule so it is only included here. ***

Task 1: Draw a green line on a white background on the monitor.


Figure 2: Shows the Single vertical line on the display


Figure 3: Shows the Code of Task 1 (first Part)


Figure 4: Shows the Code of Task 1 (part 2)

Task 2: Draw an Additional Red Bar on the monitor.


Figure 5: Shows a picture of Task 2.


Figure 6: Shows the Code of Task 2 (part 1)


Figure 7: Shows the Code of Task 2 (part 2)

Task 3: Move the Red Bar to the Right by 1 pixel every .5 seconds


Figure 8: Shows a Video of Task 3


Figure 9: Shows the Code of Task 3 (part 1)


Figure 10: Shows the Code of Task 3 (part 2)

Figure 11: Shows the Code of Task 3 (part 3)

Task 4: Bounce it back and forth between the green line and the location of 600. At a speed of .01s/pixel.


Figure 12: Shows a Video of Task 4


Figure 13: Shows the Code of Task 4 (part 1)


Figure 14: Shows the Code of Task 4 (part 2)


Figure 15: Shows the Code of Task 4 (part 3)



5. Discussion
This Lab was fairly easy to complete having already completed the VGA Homework assignment. This Lab gave me a better understanding on how the VGA system can work and what can be done to implement it using Basys 3 and Vivado. The only challening part for me was trying to figure out how to create the loop for the bouncing of the red line. Once I figured this challenge out I was able to successfully complete the Lab.