CE 433 Lab Spring 2022
Lab 3
Name: David Lee

Email: djlee1@fortlewis.edu

Seven-Segment Display on an FPGA

Introduction:
In this lab we use Verilog to create code that we will use in vivado to make our FPGA board function

Materials and Methods:
gvim(was used to write the verilog), Vivado and Basys 3Board

Results:

Task 1: Using Verilog and Vivado simulate in vivado and on the board, 1. Inverter, 2. 2-bitFull Adder, 3. 8-Input And, 4. 4-1 MUX


Figure 1: Shows the code written for the Inverter


Figure 2: Shows the simulation results of the Inverter


Figure 3: Shows a picture of the Inverter Functioning on the Basys 3 Board


Figure 4: Shows the code written for the 2-bit Full Adder


Figure 5: Shows the simulation results of the 2-bit Full Adder


Figure 6: Shows a video of the 2-bit Full Adder Functioning on the Basys 3 Board


Figure 7: Shows the code written for the 8-Input And Gate


Figure 8: Shows the simulation results of the 8-Input And Gate


Figure 9: Shows a video of the 8-Input And Gate Functioning on the Basys 3 Board


Figure 10: Shows the code written for the 4-1 MUX


Figure 11: Shows the simulation results of the 4-1 MUX


Figure 12: Shows a video of the 4-1 MUX Functioning on the Basys 3 Board

Task 2: Using Verilog and Vivado design a Running LED Program on the FPGA Board.


Figure 13: Shows the Verilog Code for the Running LED



Figure 14: Shows the video of the Running LED on the Basys 3


Task 3: Interface the switches with the 7-segment Display


Figure 15: Shows the code used for the 4 digit 7-segment display



Figure 16:Shows the Video of the 4 digit 7-segment display

Task 4: Repeat Task 3 using only one of the 7segment Displays


Figure 17: Shows the code used for the 1 digit 7-segment display



Figure 18: Shows the Video of the 1 digit 7-segment display



5. Discussion
This Lab assignment was good to complete because it allowed me to complete more complex simulations on both Vivado and on the Basys 3 Board. Overall I was able to successfully complete the lab even though I had a difficult time getting the 2-bit Full Adder to both simulate and operate on the Basys 3 board correctly.