CE338 Digital VLSI Design Lab
Lab 8 - 8-bit ALU

Connor O'Keefe
Email: cwokeefe@fortlewis.edu

Introduction:
This lab is to design the shcematic and layout of an 8-bit ALU and verify its logic with simulation.

Materials and Methods
 Procedure
First, we need an 8-bit inverter layout.


Then the schematic and layout for the 8-bit ALU:









Results
1111 1111 AND 0000 0000

Output is all 0s


1111 1111 OR 0000 0000

Output is all 1s


1111 1111 + 0000 0001

S = 0000 0000, Co = 1


1111 1111 - 0000 0001

S = 1111 1110, Co = 1

Discussion
The 8-bit ALU logic was verified with simulations. The layout was quite interesting to connect all 8-bits for all of the gates used. Overall, I found this lab very fun since we got to use all of the gates built throught the semester.