CE338 Digital VLSI Design Lab
Lab 4 - MOSFET Layout and IV Curve

Connor O'Keefe
Email: cwokeefe@fortlewis.edu


Introduction
This lab is to build MOSFET layouts in Electric VLSI and run simulations to analyse the IV curves. In this lab, an NMOS and a PMOS transistor are created and the IV curves are simulated.

Materials and Methods
 Procedure
The PMOS layout is created in Electric

The PMOS symbol is created


The same is done for the NMOS transistor
The layout:


The symbol:


Results
The IV curves for the PMOS transistor layout and symbol are shown below respectively.





The IV curves for the NMOS transistor layout and symbol are shown below respectively.





Discussion

The IV curves shown are what is expect for the transistors. This lab shows how Electric VLSI can be used to design and simulate real world components.