CE338 Digital VLSI Design Lab
Lab 2 - Design an R-2R DAC
Connor O'Keefe Email: cwokeefe@fortlewis.edu
Introduction This lab is to layout the R-2R DAC
Materials and Methods
Electric VLSI
LTSpice
Procedure Creation of the R-2R subcell schematic and icon.
Copy and pasting the subcell icon to for the full R-2R DAC schematic.
Layout of the R-2R subcell with N-Well resistors of W=15 and L=187.5.
Results
Discussion The
R-2R subcell schematic and layout successfully replaced the ideal DAC.
The waveform shown in the results was the expected output of the R2-R
DAC.
