CE433 Lab 2020 Spring
Lecture 5
Name: Braden Morrow
Email: bdmorrow@fortlewis.edu
1. Lecture 5 - Sequential Circuits
2. Introduction
The purpose of this lab was to implement and simulate a series of
sequential circuits including shift registers and a two bit sync
counter.
3. Results
Task 1:
This
task asked us to use the truth table provided to generate the logic
equations for y and q1[N+1]. We then used these logic equations to
generate the sequential circuits for y and q1[N=1].
Figure 1. Hand-drawn Logic Equations and Sequential Circuits
Task 2:
This
task asked us to implement the above logic equations using both a
behavioral and given method. Figure 2 shows the given method, while
Figure 3 shows the behavioral method.
Figure 2. Given Method Simulation and Code
Figure 3. Behavioral Method Simulation and Code
Task 3:
This
task asked us to simulate four types of shift registers. All of the figures below have both the code and simulation results.
Figure 4. SISO Simulation and Code
Figure 5. SIPO Simulation and Code
Figure 6. PISO Simulation and Code
Figure 7. PIPO Simulation and Code
Task 4:
This
task asked us to implement and simulate a counter module. Figure 8 shows the code and simulation results.
Figure 8. Two Bit Sync Counter Simulation and Code
Task 5:
This
task asked us to implement and simulate the logic from a given circuit.
Figure 9 shows the code and simulation of that given circuit.
Figure 9. Logic module Simulation and Code
4. Discussion
This
lecture was good to review sequential circuits and learn how to
implement that logic in vivado/verilog. The first and last task were
easily the hardest as we had to find the logic ourselves and hope it
worked well when implemented. I really enjoyed seeing all the types of
shift registers implemented and am happy to have those in my library
for future use.
