CE433 Embedded Systems Lab 7: Basys 3 Board to Implement an LCD Driver
Name: Audra Benally Email: albenally1@fortlewis.edu
1. Title: Basys 3 Board to Implement an LCD Driver 2. Introduction: In this lab the FPGA was used with verilog and
vivado to write text on an LCD module. Three tasks were given for this
challenge. The results were hastily implemented and shown in two
different videos.
3. Materials and Methods:
Materials: - Computer - Vivado Software
- GVim Software
- Basys 3 board and cable - LCD module
Methods:
For this lab the FPGA was used
to complete three tasks. The instructions were followed from the class
text. Some issues arose with consistency and output naming but were
fixed by referencing past labs. The second task was accomplished by
increasing the speed of the clock so that the display appeared "static"
to the human eye. The third task was implemented using the ASCII table
and was displayed on the default text.
Video 2. Almost static words.
Video link: https://youtu.be/A8bEc0RKO3I
Figure 1. Code.
5. Discussion For
this lab I had trouble getting the switches and cables right because
the given code was incorrect and a little confusing. The JA outputs
gave me trouble but I was able to eventually sort everything out after
some trial and error. I was looking for a way to make a static display
in the code initializing but gave up and use the method that seven
segment displays use and just make the clock really fast. I tried a
couple numbers before I just decided to get as much credit as I can for
what I have. The ASCII code was implemented as the default because I
ended up running low on time again.