ENGR 338: Digital Electronics (Laboratory), Fall 2017

Dr. Yiyan Li, Office Hours: MWF 3-5 pm, starting Aug 28

ENGR 338 Syllabus can be found here
Tutorials about how to edit your webpage at yilectronics.com
Student lab reports
Download Filezilla or just simply use Windows Explorer for the FTP purposes.
HTML templates can be downloaded here.

Basic Information

Time & Place:

Digital Electronics - 21048 - ENGR 338 – 1

Lecture: 8/28/17 – 12/15/17, MWF 10:10 am – 11:05 am, Berndt Hall 400

Lab: 8/28/17 – 12/15/17, R 8:00 am – 11:05 am, SFH 760

Digital Electronics - 21049 - ENGR 338 – 2

Lecture: 8/28/17 – 12/15/17, MWF 10:10 am – 11:05 am, Berndt Hall 400

Lab: 8/28/17 – 12/15/17, R 2:30 pm – 5:35 pm, SFH 760

Professor:

Dr. Yiyan Li: SFH 2755B, yiyanli185@gmail.com, yli@fortlewis.edu

Course Website: http://www.yilectronics.com/Courses/ENGR338/ENGR338_2017f/ENGR338_f2017.html

Lab Website: http://www.yilectronics.com/Courses/ENGR338L/ENGR338L_2017f/ENGR338L_2017f.html

Teaching Assistant:

TBD


Labs:
**LtSpice now is available in SFH760: Open My PC - C Drive - Program Files - LTC, you can find LTSpice there, right click on the icon, and create a shortcut onto your desktop.

Aug 31, Lab 1, Spice/RC Circuit for Digital Signal/Edit your webpage to report the lab results. Due 9/6, Wed 10 pm
Sep 7, Lab 2, More Spice and Compensated Probe for Digital Signal Probing. Due 9/13, Wed 10 pm
Sep 14, Lab 3, The inverter, IV characteristics of NMOS/PMOS Use ICs. Due 9/20, Wed 10 pm
Sep 21, Lab 4, Logic gates. Due 9/27, Wed 10 pm

Sep 28, Lab 5, Seven segment display. Due 10/4, Wed 10 pm
Oct 5/Oct 12, Lab 6, Adders (2-week lab), Due 10/18, Wed 10 pm
Oct 19, Lab 7, The Decoder (Design a traffic light controller). Due 10/25, Wed 10 pm
Oct 26, Lab 8, The Flip Flops. Due 11/1, Wed 10 pm.
Nov 2, Lab 9, Introduction to FPGA. Due 11/8, Wed 10 pm.
Nov 9, Lab 10, More FPGA Experiments, Due 11/15, Wed 10 pm.

Nov 16 - Dec 1, Projects, report due 12/1, Friday 10 pm.

Links:

Download LTSpice here
   


Go back to yilectronics.com